Analog Electronics

Op-amp gain resistor design

An ideal op-amp has very large open-loop gain, so negative feedback forces its two inputs to the same potential, the virtual short v_+ = v_-, and it draws no current into either input. Designing the gain resistors means choosing values so that the closed-loop gain or a required node voltage meets a specification. The usual method is to write v_+ = v_- and i_+ = i_- = 0, then apply KCL at the inverting node. For an inverting amplifier the gain is -R_f/R_1, and for a non-inverting amplifier it is 1 + R_f/R_1. When a divider with two equal resistors sets the non-inverting node, that node sits at half the output voltage. In a network with several parallel branches, write KCL at each node and solve the resulting linear equations together. The input resistance seen by a source is the source voltage divided by the current it supplies, and it can differ from the resistor values because the virtual short makes one terminal follow the other. A two-op-amp difference amplifier with one gain resistor R_G has gain 1 + 2R_f/R_G, and the designed gain is valid only while the output remains between the supply rails. Example: for an inverting gain of -10 with R_1 = 2\,\text{k}\Omega, the design needs R_f = 20\,\text{k}\Omega.

MOSFET small-signal analysis

Small-signal analysis linearizes a MOSFET around its DC operating point, so the operating point must be found first. In saturation the drain current is I_D = \frac{1}{2}\mu_n C_{ox}\frac{W}{L}(V_{GS}-V_T)^2, and the transconductance is g_m = \frac{2I_D}{V_{GS}-V_T}. Ignoring channel length modulation makes the output resistance r_o infinite, so the drain current depends only on v_{gs}. Impedance at the source is then 1/(g_m + 1/R_S) when the gate is at AC ground, which means the drain resistor does not appear in it. When the supply node carries a signal, the gain from supply to output depends on how the gate is biased through the resistor network, and it is found by writing the drain KCL with the gate voltage expressed in terms of the output. In a feedback amplifier with forward gain A and feedback factor \beta, the closed-loop gain is A_f = A/(1+A\beta), and the MOSFET's g_m sets A. For a MOSFET with a gate tied through a large resistor to the drain, V_{GS} = V_{DS}, and the saturation condition is checked by confirming V_{DS} \ge V_{GS}-V_T.

Zener diode voltage regulator

A Zener diode operates in reverse breakdown, where its voltage stays nearly constant over a range of currents, so it can clamp a node to V_Z. The series resistor must drop the difference between the source and V_Z, and the Zener branch must keep at least its minimum current I_{Z,min} for regulation. The maximum load current is therefore the series current minus I_{Z,min}, that is I_{L,max} = I_{series} - I_{Z,min}. The largest series resistance that still keeps the Zener in breakdown is R_{max} = (V_{supply} - V_Z)/I_{Z,min}, which is found when no load draws current. A Zener can also serve as a reference for a transistor stage: the base is fixed at V_Z, the emitter sits at V_Z - V_{BE}, and with high \beta the emitter current, and hence the current through a load in the emitter, is approximately (V_Z - V_{BE})/R_E. Example: a 5.1 V Zener with a 1 mA minimum current in a 12 V supply through a 1 k\Omega resistor needs I_{series} = 6.9 mA, which leaves 5.9 mA for the load.

Filter cutoff frequency and gain

A first-order active low-pass filter is an inverting amplifier whose feedback impedance is a resistor in parallel with a capacitor. Its DC gain is -R_f/R_{in} and its corner frequency is f_c = 1/(2\pi R_f C), where the gain falls by 3 dB. The magnitude of a gain |H(j\omega)| = A_0/\sqrt{1+(\omega R_f C)^2} equals 1 (0 dB) at the frequency where \omega R_f C = \sqrt{A_0^2-1}, which lies above the corner when A_0 is large. Given a required DC gain, the feedback resistor follows from R_f = |A_0|R_{in}, and the pole then fixes the capacitor value through \omega_c = 1/(R_f C). A second-order low-pass has the form H(s) = H_0\omega_0^2/(s^2 + \omega_0 s/Q + \omega_0^2), and at \omega = \omega_0 its magnitude equals Q\,|H_0|, so the quality factor sets the peaking. Cascading stages multiplies their transfer functions, so the overall corner and gain are obtained from the product of individual sections.

BJT current mirror

A BJT current mirror copies a reference current into one or more output branches by sharing the same base-emitter voltage. For matched transistors, I_{out} \approx I_{REF}, and the error comes from the base currents that the output transistors draw from the reference node. With n output transistors of current gain \beta, KCL at the reference node gives I_{REF} = I_C(1 + n/\beta), so the output collector current is I_C = I_{REF}/(1 + n/\beta). When the emitter of one transistor drives the base of another, the pair behaves like a single device with combined gain (\beta_1+1)(\beta_2+1) \approx \beta_1\beta_2, so a small base current produces a large emitter current. Example: with n = 2 outputs and \beta = 100, the output current is about 1/(1.02) of the reference.

Op-amp input offset and bias current errors

Real op-amps have a small input offset voltage V_{os} and input bias currents I_B, and both produce output errors that a designer must estimate. The offset behaves as a voltage source in series with one input, so it is multiplied by the noise gain of the circuit; for a non-inverting amplifier the output error is V_{os}(1 + R_f/R_g). The bias current flows through the external resistance seen at each input, so it creates a voltage error equal to I_B times the feedback or source resistance. Worst-case analysis adds the contributions with the same sign, giving the largest possible output error. In a stage with zero input, an offset at one op-amp shifts its output by a multiple of V_{os} and shifts any following stage by its gain, so the error at each output depends on the connection and the signs of the stages.

Precision rectifier with op-amp

A precision rectifier uses an op-amp inside the feedback loop so that the diode drop is cancelled, which lets it rectify signals smaller than the diode voltage. When the diode conducts, the feedback loop forces the inverting input to follow the input, and the op-amp output rises by the forward diode drop above it, so the output equals v_{in} + V_D. When the diode is reverse biased, the output is clamped and no current flows into the load path, which is why the circuit is called precision: the rectified output is nearly ideal. The diode current is set by the resistor connected to the inverting node, and it is approximately v_{in}/R during forward conduction.

Op-amp feedback and output impedance

Negative feedback changes the output and input impedance of an amplifier. With open-loop gain A, output impedance R_{out}, and feedback factor \beta, the closed-loop output impedance is R_{out,cl} = R_{out}/(1 + A\beta), so the output resistance is greatly reduced. In a unity-gain voltage buffer the entire output is fed back, so \beta = 1, and the output impedance of the buffer becomes very small even though the open-loop output resistance is modest. The same factor (1 + A\beta) raises the input impedance of a feedback amplifier, which is why buffers are used to isolate a source from a load. Example: with A = 10^4 and R_{out} = 100\ \Omega, the closed-loop value is about 10\ \text{m}\Omega.

Diode-capacitor peak detection circuit

A diode-capacitor peak detector charges the capacitor through the diode whenever the input exceeds the stored voltage, so the capacitor holds the largest input value reached so far. When the input falls, the diode is reverse biased and the capacitor keeps its voltage if no discharge path exists. The initial capacitor voltage sets the starting output, and it is replaced only by a larger peak. Negative excursions of the input do not charge the capacitor in this configuration, and the output decays only through a load resistor, with time constant RC. Example: if the input peaks reach 0.8 V and then 0.5 V, the output stays at 0.8 V after the second peak.