Analog Circuits: Diodes, BJT/MOSFET Amplifiers and Op-Amps

Ideal op-amp circuit analysis

An ideal operational amplifier has infinite open-loop differential gain, infinite input resistance, and zero output resistance. When negative feedback is present, two working rules follow: the virtual short, which makes v_+ = v_-, and zero input current into both terminals. Analysis starts by writing KCL at the inverting node, which sits at the potential of the non-inverting terminal. Standard results are a non-inverting gain of 1 + R_f/R_1, an inverting gain of -R_f/R_1, and an inverting summing output of -R_f(v_a/R_a + v_b/R_b) for two input branches. Multi-stage networks are solved stage by stage, with the output of one stage used as the input of the next. Note that an ideal op-amp has zero common-mode gain (infinite CMRR), not infinite common-mode gain. For a bridge-style or resistor-network circuit, the usual method is to find the inverting-node voltage first and then apply KCL to the feedback branch. The overall ratio of such a network often reduces to a simple resistor ratio, which is a fast check on the algebra. A feedback network with a switch can change the gain: shorting a feedback resistor lowers the non-inverting gain 1 + R_f/R_1, which changes the output for the same input. A branch with a grounded non-inverting input makes the inverting node a virtual ground, so the current through an input resistor is set entirely by the input voltage and that resistor.

MOSFET saturation region drain current

In an enhancement-mode NMOS, the overdrive is V_{ov} = V_{GS} - V_t. In saturation, where V_{DS} \ge V_{ov}, the drain current is I_D = \tfrac{1}{2}\mu_n C_{ox}\tfrac{W}{L}V_{ov}^2, and the device follows a square law. In triode, where V_{DS} < V_{ov}, the current is I_D = \mu_n C_{ox}\tfrac{W}{L}\left[V_{ov}V_{DS} - \tfrac{1}{2}V_{DS}^2\right]. The edge of saturation is the point where V_{DS} = V_{ov}, so the two expressions agree there. When a drain resistor is present, the load line V_{OUT} = V_{DD} - I_D R_D is solved together with the square law to find the bias. A useful habit is to write k = \tfrac{1}{2}\mu_n C_{ox}\tfrac{W}{L} with units that match the resistor. In a triode-to-saturation boundary check, the maximum current is found by evaluating the triode expression at the largest overdrive, since the current is not monotonic in saturation alone. In a current mirror, the output current scales with the ratio of the device widths over lengths, so a device with W/L five times larger carries five times the reference current when both have the same overdrive. A transistor whose gate is tied to its drain satisfies V_{DS} = V_{GS} > V_t, so it is always in saturation and behaves as a diode-connected device.

Diode limiter transfer characteristic

A limiter is a piecewise-linear network that clamps the output between set levels. A diode conducts only when it is forward biased beyond its cut-in voltage. With two antiparallel diodes in series with a reference, the output follows the input inside a band and stays at a fixed level outside it. The transfer characteristic is found segment by segment: in each region, identify which diodes are on, replace them by their ideal or cut-in models, and find the output in terms of the input. The breakpoints are the input values at which a diode turns on, and the slope is 1 in the segments where the output follows the input with an offset. A bridge of four ideal diodes around a load yields an output that depends on the magnitude of the input rather than its sign, so the output is |V_I| and the load current follows the input polarity. For a series diode with a battery, the forward-bias interval is the set of input phases for which the source exceeds the battery-referenced threshold. For a sinusoid of amplitude A and threshold -A/2, the input exceeds the threshold for 240^\circ of each cycle, which is 2/3 of the period. A diode clamped between a source and a reference of 2 V and 4 V produces a peak output determined by the divider formed by the source and the series resistor, so the peak is found at the maximum input.

MOSFET small-signal transconductance

The small-signal transconductance of a saturated MOSFET is g_m = \dfrac{\partial I_D}{\partial V_{GS}} = \mu_n C_{ox}\tfrac{W}{L}V_{ov} = \dfrac{2I_D}{V_{ov}}. The output resistance is r_o \approx 1/(\lambda I_D) when channel-length modulation is included. Body effect is absent when the substrate is tied to the source. In a small-signal analysis, a transistor is replaced by a voltage-controlled current source g_m v_{gs} in parallel with r_o, and the node voltages are found by KCL. A source-connected resistor loads the source node, so the small-signal voltage at the source is i_d times that resistor, and the ratio of two node voltages can depend only on the resistor ratio. When a source is driven through a follower-type connection, the resistance seen at the source is 1/g_m in parallel with r_o, and this load determines the gain of the other transistor. In a differential pair with a symmetric drain resistor R_D, the single-ended gain is -g_m R_D, so a differential input of amplitude \Delta v produces an output swing of g_m R_D \Delta v.

Op-amp active filter 3 dB frequency

A first-order active filter uses an RC element at the input or in the feedback path of an op-amp. The gain magnitude falls by 3 dB, a factor of 1/\sqrt{2}, at the corner frequency where the reactance equals the resistance. For an RC network with time constant \tau = RC, the corner is \omega_{3\,\mathrm{dB}} = 1/\tau for a single pole. A series capacitor at the input of an inverting amplifier makes the gain zero at dc, so the response is high-pass, while a capacitor in parallel with the feedback resistor gives a low-pass response. A Bode magnitude plot is read by taking the passband gain as 1 + R/R_1 for a non-inverting stage and the corner as the frequency where the plot is 3 dB below that level. A band-pass response is formed by cascading a high-pass and a low-pass section, and the upper and lower corners satisfy a ratio fixed by the component values. For a band-pass circuit whose lower corner is at 1 MHz, the upper corner is found from the ratio \omega_H/\omega_L set by the resistor and capacitor multiples.

BJT DC bias in active region

In the active region, the base-emitter junction is forward biased and the collector-base junction is reverse biased. The terminal currents are related by I_C = \beta I_B and I_E = (\beta+1)I_B = I_C + I_B, and the base-emitter voltage is about 0.7 V for silicon. A DC analysis starts from the base current, which sets the collector and emitter currents, and then computes the node voltages with respect to ground. The collector-emitter voltage is the difference of these node voltages, V_{CE} = V_C - V_E, not the collector voltage alone. A diode-connected transistor fixes the emitter-base drop at 0.7 V, and the emitter current equals the current through the emitter resistor, so the base node voltage can be found from the Zener or reference voltage. In a feedback configuration, an op-amp drives the base, and the emitter is forced to follow the input through the feedback loop. The emitter current is then the input voltage divided by the emitter resistor, and the base current is this emitter current divided by (\beta_{dc}+1), which must be checked against the active-region condition.

BJT small-signal voltage gain

In the hybrid-\pi model, the base-emitter resistance is r_\pi = \beta/g_m, and the transconductance is g_m = I_C/V_T. The small-signal output of a common-emitter stage is v_o = -g_m R_C v_{be}, where R_C includes any load in parallel. For a source with series resistance R_S, the base current is set by the voltage across R_S + r_\pi, so the gain is -\beta R_L/(R_S + r_\pi) when the dependent current source drives the load. An unbypassed emitter resistor reduces the gain: the stage gain is approximately -R_C/(R_E + r_e) with r_e = V_T/I_E, and a bypass capacitor restores the larger gain at signal frequencies. Coupling capacitors have negligible effect when their reactance is small compared with the impedances in the circuit at the signal frequency.

Ideal op-amp comparator operation

An ideal op-amp in an open-loop or high-gain configuration saturates when the input difference is not zero. When the output is taken from an inverting summing network with a reference input, the output is proportional to the difference between the input and the reference, and the output is zero at the balance point. For equal input resistors R and feedback R_F, the output is -(R_F/R)(V_{IN} - V_{REF}), so the zero-output condition is V_{IN} = V_{REF}. The gain magnitude sets how sharply the output switches between the rails.

Diode clamper output with pulse input

A clamper shifts the dc level of a waveform without changing its shape. A capacitor charges through a diode during the conducting interval and holds that voltage afterward. The output is then the input plus the stored capacitor voltage, with the level determined by the diode polarity. The time constant RC controls how much the capacitor discharges during the off-time, so when the off-time is much shorter than RC, the output level changes very little. For a pulse train with a long on-time, the capacitor charges to the peak of the pulse, and the output swing equals the pulse amplitude.

Op-amp integrator step response

An op-amp integrator uses a capacitor in the feedback path so that the output is v_{out}(t) = -\tfrac{1}{RC}\int v_{in}\,dt while the op-amp stays in its linear region. The capacitor voltage cannot change instantly, so an uncharged capacitor means zero voltage across it at t = 0^+. For a step input, the output ramps linearly with slope -V_{in}/RC. If the value required by the virtual-ground condition exceeds the supply limits, the op-amp saturates at the rail rather than following the ideal expression. When two capacitors are in parallel, their values add, so the effective capacitance is the sum of the individual values.

Op-amp relaxation oscillator capacitor voltage

A relaxation oscillator uses positive feedback to switch the op-amp between its two saturation rails, and a capacitor charges and discharges between two threshold levels. The capacitor voltage swings between the upper threshold V_{TH} and the lower threshold V_{TL}, and the peak-to-peak swing equals the hysteresis width V_{TH} - V_{TL}. The thresholds depend on the output rails, the divider resistors, and the diode state; a diode in the feedback branch changes the threshold for one polarity of output.

Diode small-signal incremental resistance

For a diode with a piecewise-linear model, the small-signal resistance is r_d = V_T/I_D when the diode is biased in its exponential region, and it is zero for an ideal conducting diode. An ideal diode is an open circuit when reverse biased or below the turn-on voltage, and a short circuit with zero small-signal resistance when conducting. The small-signal gain of a divider with a diode therefore depends on the diode state: with the diode off, the open circuit removes one branch, and with the diode on, the node is tied to the cathode voltage. The ratio of minimum to maximum small-signal gain is found by computing the gain for each state.

Amplifier type from input and output impedance

The type of an amplifier is identified from the impedance seen at its input and output. A voltage amplifier has a high input impedance and low output impedance, so its output is a voltage. A current-controlled current source has a low input impedance, which makes the input current the controlling quantity, and a high output impedance, which makes the output behave as a current source. A common-gate stage has a low input impedance at the source, approximately 1/g_m, and a high output impedance at the drain, so the drain current follows the input current.